[Gb-ccb] forwarded message from John Ford

[Martin Shepherd]

On Wed, 21 Jan 2004, Richard Lacasse wrote:
> Am I correct in assuming that the frequency of the reference signal
> available in the receiver room for the Cal Tech CCB is 10 MHz?

Beware that my current plan is to run the FPGA from a 40MHz clock, and
have the FPGA generate the ADC 10MHz clock from this, by frequency
dividing it by 4. This will ensure synchronization between the two
clocks.

Martin