[Gb-ccb] CCB architecture issues/status

[Brian Mason]

hi all- I think I speak for everyone in saying I will be very glad to see
all of the architecture issues sorted out! Notwithstanding the frustration
involved in the process-- much of which can be ascribed to the medium of
email, and the time-delay/ordering effects it causes-- I think a great
deal of progress on the technical issues is being made.

The key issues seem to be

1. Do we have to use USB 2.0 or can we use USB 1.0?

2. How should we synchronize the FPGAs using 1PPS + 10MHz?

On the second point-- and in connection with Martin's suggestion to
generate a 1-PPS pulse that is delayed to the opposite edge of the 10MHz
signal-- I'd like to highlight the provision in Randy's architecture for
timing signal conditioning (he pointed this out in an email yesterday
afternoon).  It's not something we've needed to do for other applications,
but if it simplifies the FPGA programming and improves reliability in this
case we should do it.

I would like to suggest that everyone focus on these issues.  When we
reach a consensus on them we will be able to make much more progress on
the detailed work still ahead of us.

I'm going to be travelling next week but I suggest we plan on a telecon
early the following week (01mar).  Meanwhile Randy & Chuck are moving
ahead with assembling the detector circuit, and we are planning the suite
of lab tests that will be needed for it.

 Brian

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Brian Mason                           | office: +1(304)456-2338
Assistant Scientist                   | fax:    +1(304)456-2229
National Radio Astronomy Observatory  | mail:   PO Box 2 
bmason at gb.nrao.edu                    |         Green Bank, WV 24944
http://www.gb.nrao.edu/~bmason/       |
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