[Gb-ccb] phase switch rates / samp_per_state

[Brian Mason]

I'm also thinking mostly about normal operations.  Note that #3
(selectable control) need not necessarily be done via software.  We
shouldn't be doing that very often.

 Brian

On Thu, 12 Feb 2004, Martin Shepherd wrote:

> 
> On Wed, 11 Feb 2004, Brian Mason wrote:
> >... I believe the two most significant changes to the CCB software
> > interface resulting from the faster ADC sampling, as Tim & I
> > corresponded about around 13aug03, are a) samp_per_state now must
> > support larger values; & b) there is no analog blanking dt.
> 
> It's a bit too early to say yet, since I am still at the earliest
> stages of getting to grips with the FPGA programming, but I can think
> of at least a couple of additions.
> 
> 1. An extra parameter specifying the round-trip delay between the FPGA
>    toggling a phase-switch or cal-diode control line, and the arrival
>    from the ADC of the first sample that is affected by this. This will
>    include the propagation delay through the opto-isolators and other
>    electronics, plus the pipeline delay in the ADC and probably also
>    the pipe delay in the FPGA.
> 
> 2. All of the parameters needed to control the new dump mode. I am too
>    bogged down in trying to figure out how to program the FPGA(s) to
>    handle the normal operating mode to think about this yet.
> 
> 3. If we are really going to have 4 FPGAs, and Randy's idea of being
>    able to have warm backups by being able select which of the FPGAs
>    controls the cal-diode and phase-switch control lines, then there
>    will also need to be a parameter selecting which board does this.
>    Similarly the returned error codes etc, presumably will need to
>    include extra parameters identifying the originating board(s).
> 
> Martin
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> 

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