[Gb-ccb] Project Meeting Draft agenda & schedule

[Brian Mason]

All- below I've put together a draft agenda & schedule for our project
meeting this Thursday and Friday.  Generally we should think of this
as a *working* meeting, not a formal event, and I think our main goals
are a) to agree on the detector amplifier circuitry all the way up
through the ADC so that we can start working on a benchtop prototype;
& b) to at least frame, if not answer, the questions needed to choose
a specific FPGA (part number) so that the programming and board layout
can get rolling.  On the latter score we will be lucky to have Holly
Chen sitting in on the FPGA discussion; she is an engineer from our
electronics division with a good deal of experience in this area.  Tim
& I will also work on the post-design-phase project plan. Please let
me know if there are any additions or changes you'd like to see in the
agenda.  I note that software is *not* on my draft agenda but if
anybody has concerns that need to be addressed we could easily add it
Friday afternoon.

 cheers,
  Brian

ps, It would be useful (particularly for the detector circuit
discussion) to review Randy's latest design, and Martin's interface
document:

http://wwwlocal.gb.nrao.edu/~bmason/gbt-dev/KaRxDetAmpRevH.bmp
http://www.astro.caltech.edu/~tjp/GBT/ccb_external_hardware_interfaces.pdf

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CCB Project Meeting Agenda & Schedule

Thursday
9am-11:30am   Rm 137  Detector Circuit discussion
                      -Go through detailed noise calculation as needed,
		         agree on bottom line;
                      -Review Rev H Rx-side detector amp circuit, with
		         the goal of removing the "PRELIMINARY" stamp
			 so we can order parts;
		      -Review the backend-side detector amp circuit
		         through the ADC.
                      -Other items: RFI filter impact; what
		         should we do for lab testing; ...
                      
1:00-1:30     Rx Lab  Ka-band show & tell

1:30-4:30pm   Rm 241  FPGA discussion
                      -Review what the FPGA needs to *do*
                      -Review input/output signals, roughly
		        estimate number of pins required
		      -Outline our current concept of the computer/
		        FPGA interface
                      -practicalities: how will we upload the 
                        FPGA program; what is the development
			platform of choice; ...

Friday

9am-noon   Brian's office  Project Planning (TJP, BSM)
                                                  
after lunch  Rm 241 --> is reserved for further discussion & overflow 
		        should we need it.

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Brian Mason                           | office: +1(304)456-2338
Assistant Scientist                   | fax:    +1(304)456-2229
National Radio Astronomy Observatory  | mail:   PO Box 2
bmason at gb.nrao.edu                    |         Green Bank, WV 24944
http://www.gb.nrao.edu/~bmason/       |
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