[Gb-ccb] CCB Integrations

[Martin Shepherd]

On Thu, 21 Aug 2003, Brian Mason wrote:
> for configurable manager level integration.  I do have one question
> however: is sample_dt now a dummy variable always having a value of 1?
> (with units of 100 ns)

No. This parameter doesn't only set the A/D sample time. It also sets
the interval between steps in the phase-switch state-machine. As such,
it makes sense to continue interpretting it as documented, and simply
take the fact that integration up to this interval is now performed
digitally instead of by an analog integrator, as an internal hardware
implementation detail that only the hardware needs to know about.

> It is the case that the CCB can be configured to overflow the
> integration buffers rather easily. This is fine, but we'll need a
> rule, probably at the manager level, to prevent it.  I have worked out
> the rule to be
>
>  samp_per_state * integ_period < 2^20 =~ 10^6
>
> This rule is independent of the number of phase switches in
> use. Martin and/or Tim, can you check me on this? This is mostly to
> validate my understanding (of the document, and our emails...).

For the strongest signals, this interval is indeed the point at which
the registers will overflow.  For weaker signals it is a bit
pessimistic, since the limit for the weakest signals is nearly twice
this interval.

Martin