[evlatests] [vlbatests] Phased VLA fringes!

Walter Brisken wbrisken at nrao.edu
Tue Apr 9 12:52:00 EDT 2013


I ran the switched power decoder on the VLA samples that Vivek had 
collected.  If the clocks generating the switched power and the clocks 
generating the VDIF timecodes had a relative error of 1.7 ms, it should be 
quite noticable as a displacement of the rise time from a 1PPS tick.  I 
see no such offset (limit of about 0.2 ms).  This internal consistency 
points more to a global offset of the VLA's timing relative to the rest of 
the world.

 	-Walter

On Tue, 9 Apr 2013, Vivek Dhawan wrote:

> Thanks to Walter, and  "real time"  DIFX, (2 hours/GByte transfer), the VLA
> clock was found at +1704 usec on April 5th.    Backtracking to projects in
> March,  Paul Dyer has in short order found all the missing fringes.
>
> expt       Date        usec.     BW
>
> ty028a   Apr 05    1704     1 MHz
> bb321N  Mar14    1667     128
> bb321L  Mar13     1667     128
> bk178c  Mar01     1670     16
>
> The offsets may depend more on bandwidth (we have seen this before)
> than on time elapsed since March 01. No offset is seen in the monitor
> point  (VLA_GPS to clock) in the master LO.
>
> The ~2msec offset is not apparent on the VLA internally, but now we
> must find out how and why it happens.  It may also be that the regular
> VLA data is fine, but the VDIF stream has slipped relative to it.
> I don't know if that is even a legal thought.
> Tests must be devised, anyone have ideas?
>
> I will set up another real-time session soon.
>
> Relatively less significant mysteries remain:
> The 4 subbands have (sometimes) different delays and amplitudes,
> especially on bk178 (centaurus A) but that I am attributing to the
> channels being badly phased. Chan 1 is sometimes lower amplitude.
>
>
>
> _______________________________________________
> vlbatests mailing list
> vlbatests at listmgr.cv.nrao.edu
> http://listmgr.cv.nrao.edu/mailman/listinfo/vlbatests
>



More information about the evlatests mailing list