[evla-sw-discuss] summed array AGC discipline

[Ken Sowinski]

Introduction

Running scripts which use the summed array capability of Widar is
complicated by the need to interact with the correlator to control the
AGC behavior of the summed array circuitry.  This is a burden on
scientific support staff and the operators.  To remedy this my
preference is to implement a predictive algorithm that sets the summed
array requantizer gains assuming that the filter outputs received will
all be set to the nominal 2.7 for four bit samples.  I welcome efforts
to talk me out of this.


Hardware Summary

The summed array implementation in Widar is embodied in the two RXP
chips (P for phasing) on the baseline board.  Refer to the RXP RFS
document for all the details.  By default all antennas in the subarray
are included in the sum.  Antennas may be excluded and the list of
excluded antennnas may be altered without reconfiguring the
correlator.  The signal from each antenna is mixed with an LO which is
exactly the phase model used by the correlator chips, producing a
complex output which is summed with the corresponding signal from all
other antennas.  Eight bits of the digital sum are extracted, this is
called windowing, and presented to a Hilbert transform to make a real
data stream, and then requantized.  The requantized data can be
correlated by Widar using the same configuration as the ordinary
correlation products for that subband, and can be output as UDP
packets carrying VDIF frames.  In the first case, only four bit
requantization is allowed; for VDIF output one, two, four, or eight
bit requantization is allowed.  If four bit VDIF is selected both
outputs will be identical.  The one bit and eight bit VDIF cases are
not interesting because there is no gain knob associated with the
requantization process for those cases.


Controls at the Hardware Level

No direct control of the window selection is provided.  Internal to
the FPGA is circuitry which chooses an optimal window setting based on
which bits in the summed data are toggling, reports it to the CMIB,
and optionally applies it to the datapath.  The gain knob of the
requantizers can only be controlled by the CMIB; there is no AGC
implemented within the FPGA.  Power measurements are provided to the
CMIB in the case of two and four bit requantization to enable
implementation of an AGC by the CMIB.


Controls at the CMIB Level

The CMIB interprets XML messages from CM, or other utility programs,
to control the phasing circuitry.  The schema was originally designed
to expose all the hardware registers of the FPGA and provided little
abstraction.  Since then Bruce has added functionality along with XML
support at a more abstract level which CM has not yet made use of.
This allows control of the window choosing mechanism and the two and
four bit requantizers.  Three modes are defined which can be applied
to any of the three components listed above.

o  Off which leaves everything unchanged,
o  On which implements a continuous AGC,
o  Set which is a composition of On followed by Off after power
    levels have stabilized.

In addition parameters are defined to set the requantizer output RMS
set point or, alternatively, the gain knob setting.


Controls at the VCI Level

The VCI schema defines attributes which correspond to all the
controllable features of the phasing block of the RXP chip.  All are
parsed by CM, but not all are used internally or passed on to the
CMIB.  In particular all the attributes dealing with the control of
window selection are set to default values.


Another Scheme

If for each subband and each antenna we set the filter chip
requantizer gain to a known output RMS, then if we know the number of
antennas in the summed array, the window and requantizer gain can be
calculated.  Doing this offers the simplification of not having to
know when to freeze the summing circuitry gain settings at the cost of
a little more work for Bruce.  The window selection is set by the
hardware.  If the CMIB calculates and sets the requantizer gain as a
function of the window setting and the number of antennas in the array
whenever either changes, then once the filter requantizer gain is set,
the summed array gain will be correct.  Since we have already worked
out the timing of the filter requantizer gain setting, the hard part
is done.  This scheme is only appropriate in the two and four bit
cases.  For one bit samples, gain is irrelevant as long as it is non
zero, and in the eight bit case the only gain control available is the
window selection.


Use Cases

It is not clear to me how many there are nor what is the best AGC
discipline.  The two obvious examples are summed array output used for
VLBI, or for pulsar observations.  Pulsar observations benefit from
having the system gain held constant once the observation has begun.
VLBI correlation normalizes by the total power of the two correlated
signals so any gain changes are hidden and a continuous AGC may be
adequate.

A third use case is perverting the summed array circuitry to send the
data from many single antennas to CBE nodes for recording, or other
processing.  The only use made of this so far is to record data for
correlation with LWA using its software correlator.  In this case we
have treated gain setting just as we do for pulsar observations.
Another potential use for single antenna data would be an
implementation of the "radar mode" feature we contemplated for the
station boards.


Problems

There are several problems which may have bearing on how we decide to
proceed.

1.  Deciding whether, and when, to "freeze" the gain settings is not
trivial.  It can be determined autonomously by the CMIBs, or conveyed
by the script, probably via modify messages to CM created for the
purpose.

2.  The alternative scheme described above suffers if the filter gains
are not properly set.  The algorithm to determine the requantizer gain
is known for four bit input samples, but must be verified for seven
bit samples should we ever implement that capability.

3.  A fundamental problem is the way the the FPGA chooses the window.
If the summed voltage level is close to a bit boundary, it alternately
chooses one setting or the other every minute or so.  This is
especially a problem when eight bit VDIF samples are desired beause
there is no requantizer gain to take out the variations.  Further, the
algorithm tends to be too cautious, allowing lots of headroom but
providing a voltage RMS of the output stream of between five and ten.
The low end of this range begins to reduce the effective sensitivity
of eight bit samples.  If we had the resources we should consider
rewriting the FPGA to allow the CMIB to control the window selection
directly.  This would be a simplification compared to the current
implementation.  Failing that, and if we still consider this a serious
problem, there are tricks we can play in the CMIB to try to coerce and
freeze a desired window selection.


Implementation

1.  If we want to use the control ability we already have available in
the CMIB, there is a little bit of work to be done in CM to connect
VCI attributes to the CMIBS to be acted on.  I assess this to be a
very modest and simple effort.  If differenct AGC disciplines were
desired for VLBI and pulsar observations, then some OPT/m2s work is
necessary on order to embed the information into the VCI.  If a single
default behavior is always sufficient, then OPT/m2s need not change at
all.
2.  If we want to implement the alternate scheme described earlier
most of the burden would be in CMIB code to predict and control the
requantizer gain.  I guess that this would be a few days of work and
some careful testing.  There would likely be no need to change CM or
higher level code.
3.  No matter what else is done, we may choose to have the executor
create modify documents to control summed array and VDIF behavior. 
If this is modeled on the existing method used to set the filter
requantizer gains only a small effort is required.