[evla-sw-discuss] Possible MIB Processors

George Peck gpeck at aoc.nrao.edu
Thu Jan 17 19:14:24 EST 2002


Following is a list of some of the devices that have been suggested
for consideration for the MIB.  Most are microprocessors with embedded
ethernet controllers.  The Compulab 586 is a computer on two boards
(called the CORE and BASE).  There may still be other solutions to be
considered that we have not yet found.

EC-1	

	Synergetic, A Division of Lantronix
	80186 Architexture
	On Board Ethernet with MII Interface
	256 KBytess SRAM
	SPI, RS-232, CAN
	32 I/O Lines
	48 MHZ

MPC 8260
	
	Motorola
	PowerPC Architecture
	On Board Ethernet with MII Interface
	Floating Point Unit
	Interface to SRAM
	SPI
	Parallel I/O Registers
	133-300 MHZ

MPC 860

	Motorola
	PowerPC Architecture
	On Board Ethernet
	Interface to SRAM
	SPI
	66 to 80 MHZ

Power PC 405GP

	IBM
	PowerPC Architecture
	On Board Ethernet with MII
	4K SRAM
	SPI
	200 MHZ

MCF5272

	Motorola
	Coldfire Family
	On Board Ethernet with MII
	68000 Programming Model
	4K SRAM
	SPI
	66 MHZ

NET+ARM

	NetSilicon
	ARM Architecture	
	On Board Ethernet with MII
	SPI
	Up to 24 I/O Lines
	Up to 16 Kbytes Internal RAM
	33-44 MHZ

CS89712

	Cirrus Logic
	ARM Architecture
	On Board 10BaseT Ethernet
	48K Bytes of SRAM
	SSI (probably SPI compatible)
	18-74 MHZ

AT75C220
	Atmel
	ARM Architecture
	On Board DSP
	On Board 100 Mbps Ethernet MAC
	24 I/O Pins
	Comes with customized port of Linux Kernal including TCP/IP stack
	40 MHZ

Compulab 586 CORE and BASE 

	 Compulab
	 We would need both Core and a Base
	 PC Architecture (PC104)
	 AMD 586 (Pentium Class) Processor
	 CORE
		Credit Card Size
		Must plug into 586 BASE or home built base
		ELAN SC520 CPU (x86 Architecture)
		Processor Includes Floating Point Unit
		Up to 4 Mbytes Flash ROM (not on CPU chip)
		Up to 64 Mbyte SDRAM (not on CPU chip)
		Up to 128 Mbyte Flash Disk (not on CPU chip)
		Synchronous Serial Interface (SPI compatible)
		Ethernet 100BaseT (no MII)
		100-133 MHZ 
	 Base
		CORE plugs in to BASE
		BASE is needed to provide power and all other
		     connections to CORE
		If we use the CORE, we might build our own BASE.

		
		



















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