[evla-sw-discuss] MIB Study Group-Search for the MIB Processor

[Bruce Rowen]

As a first alternative, a quick Google search turned up the netsilicon ARM device
http://www.netsilicon.com/EmbWeb/modules/search_tools.asp?ToolsID=533

also the Cirrus device
http://www.cirrus.com/design/products/overview/index.cfm?DivisionID=4&SubdivisionID=42&ProductID=135

Wayne Koski wrote:

> In this opening salvo, I wish to put down why I'm somewhat enamored on
> using the EC-1.  As part of the study group, I'll be carefully looking at other
> possibilities based upon what I like to look for in such a device.
>
> So here is the EC-1 in a nutshell:  * = Key Items of interest, prioritized.
>
> *A flexible Boot methodology using a 2K on-board boot loader.

This device doesn't have on board boot memory, but it does support a wide
variety of ROMs. Another ARM device (Cirrus Logic CS89712) I'm still looking at has

on-chip boot rom

>
> *256Kbytes Static RAM.

16KB (48KB in the Cirrus)

>
> *Ethernet MII interface.

Yes 10Base and 100Base MAC (Cirrus has 10Base with rcv/xmt buffers full MAC)

>
> *8K bytes of dual port RAM

P1284 (co processor) interface  (Cirrus unknown)

>
> *A SPI Interface.

Yes for both

>
> *16M Bytes address space.

32 bit (4 gig) and Cirrus is 28 bit (64 MB)

>
> *Two UARTS.

NetSilicon: 2  Cirrus: 2 (16550 type)

>
> *26mm x 26mm x 1.5mm

NetSilicon: 208p PQFP  Cirrus: 256 PBGA

>
> JTAG

NetSilicon:  Probably  Cirrus: Yes

>
> Watchdog Timer.

NetSilicon:  Y   Cirrus:  ?

>
> Three timers.

NetSilicon: Two Cirrus: two 16 bit

>
> Four DMA methods.

NetSilicon: 10  Cirrus: 5

>
> Simple chip select logic.

NetSilicon: has gobs of options  Cirrus: ditto

>
> Two CAN Interfaces.

NetSilicon:  2  Cirrus: no

>
> Intel 186 derivative.

ARM based. Industry standard in nearly every embedded system
no goofy Intel memory segments or strange endian format

Also the NetSilicon device is 44 MIPS, Cirrus has a dynamic clock that can be run
at
18,36,49 or 74 MHz (18-74 MIPS) plus "very low noise emission"

Both have gobs of I/O pins
Cirrus has a 32 bit real time clock + comparator, dual 96KHz PWM interface,
ROM/SRAM/FLASH controller, 270mW @ 74 MHz

NetSilicon has 36 external interrupts.

>
>
> As you can see, my interest lies in the ease of loading and executing software,
> followed by methods of interfacing.  Surprising enough CAN wasn't a major
> factor, but was a nicety in that it could cover usage of ALMA modules during
> hardware development.  The processor being based upon the Intel 186 was
> also a nicety as we have people in the M&C lab who have knowledge of this
> device.

ARM OS's are large in number and complexity, all provide a form of "monitor"
to poke/peek memory and registers, etc.

>
>
> What is missing from the EC-1 was internal Flash that would hold the
> Operating System (RTOS).  But, given the fact that the EC-1 had 256K in it,
> I hoped that the RTOS + MIB application core would fit in it.  All I needed to
> do was to load everything from an external serial flash.  However, I did allow
> for 2M of flash plus 1M RAM to cover a probable underestimate of software
> requirements in my design.

Memory certainly will scale with module task complexity

>
>
> Therefore my main attraction to the EC-1 was that the amount of external parts
> required to build the MIB was low.  And the external complex parts were the
> physical Ethernet devices and memory.  The rest of the design were serial
> translators for RS232, RS485, and CAN.  Add to that buffers and simple glue
> logic and thats the design. On-board A/D or D/A would add a degree of
> complexity, but I didn't get that far anyway.

ARM's come in a lot of different flavors in terms of speed and on-chip toys.
The nice thing is the core CPU is common and could be scaled as needed
(antenna = complex toys, low horsepower CPU
correlator = simple bus style interface but high HP requirements)

>
> Well, now on to what I think we should look for with our search for an
> embedded processor.  And my criteria will apply for COTS or NRAO designed.
>
> The problem is size.  Because the MIB is going into modules, it is natural to
> make it as small as possible in all dimensions.  Note the following: (L x W x H)
>
> VLA Dataset = 529mm x 178mm x 36mm
> VLBA SIB = 161mm x 140mm x 18mm
> AMBSI1 = 160mm x 100mm x 13mm
> AMBSI2 = 46mm x 36mm x 16mm
>
> My target was AMBSI2<= MIB <= AMBSI1. Note, this size includes a
> complete functional MIB that includes connectors to the Fiber Ethernet and
> User Device.  Also it excludes height, which should be kept below 20mm.
>
> The more the embedded processor has in it, the smaller the MIB. So for me the
> perfect embedded processor should have:
>
> *Flash memory to hold the RTOS and application
> *Enough Static RAM to store data for device and Ethernet.
> *Ethernet MII interface.
> *A micro to micro communications method such as Dual Port RAM
> *A SPI Interface.
> *Large external address/data bus
> *Two UARTS.
> *Small Package.
> *Single voltage supply +3.3V. Can live with two, usually +2.5V for the core.

The NetSilicon device is 3.3, I think the Cirrus is 2.5 (all single)

>
>
> Nice to have and rather standard for most embedded processors anyway:
>
> JTAG
> Watchdog Timer
> Timers and/or Real time Clock.
> DMA.
> Simple chip select logic.
> Built-in Floating Point Co-Proccesor
>
> Really nice to have, but could be added externally:
>
> A/D, 8 channels, +/- 10V, 12 or more bits of resolution.
> CAN Interface.
>
> Now, I know that I'm wishing for the moon here.  However, for me the EC-1
> handed to me most of what I was looking for.  So I want to look for something
> that has what the EC-1 offered as well as more.
>
> Now, what criteria have I missed?
>
> Finally, let the hunt begin.  Please provide urls, etc. for your discoveries.
>
> -wayne-
>
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Bruce Rowen                             National Radio Astronomy Observatory
Scientific Programmer                           Array Operations Center
browen at aoc.nrao.edu                       P.O. Box O  Socorro, NM   87801
(505)835-7329                                        (505)835-7000
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