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Martin Shepherd wrote:<br>
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cite="midPine.LNX.4.58.0402191233210.27118@goblin.caltech.edu">
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On Thu, 19 Feb 2004, John Ford wrote:
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The phase is adjusted locally to the receiver room, just upstream of
the CCB. The 1 PPS and 10 MHz signals that the CCB sees are phase
locked together and the edges are noncoincident. If you wanted to
change the phase, just change the length of one of the cables.
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Wouldn't it make sense to force correct operation within the CCB,
rather than rely on subtle external conditions like this? If the wrong
peice of coax got used during an observing run, how would one ever
know? Wouldn't it be prudent to add a flip-flop outside the FPGAs,
that generates a 1-PPS pulse that is explicitly delayed to the
opposite edge of the 10MHz signal to the edge that is used to
synchronize operations within the FPGAs? This would ensure that all of
the FPGAs received a 1PPS edge that always occurred 50ns before the
next synchronization edge of the 10MHz reference signal. There would
then be no ambiguity in which 10MHz cycle to sync to, and no
dependence on using the right external cable.
Martin
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All,<br>
<br>
I'd suggest that you revisit my overall configuration drawing, paying<br>
particular attention to the (newly designated) internal distribution
point <br>
for both the 1PPS and 10MHz reference signals. Wouldn't this be<br>
a convenient (and appropriate) point at which to dial in the relative<br>
phases of the signals in question???<br>
<br>
Randy<br>
<br>
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